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an important notice at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. production data. sn74avc4t774 sces693e ? february 2008 ? revised october 2017 sn74avc4t774 4-bit dual-supply bus transceiver with configurable voltage-level shifting and 3-state outputs with independent direction control inputs 1 1 features 1 ? each channel has an independent dir control input ? control inputs v ih /v il levels are referenced to v cca voltage ? fully configurable dual-rail design allows each port to operate over the full 1.2-v to 3.6-v power-supply range ? i/os are 4.6-v tolerant ? i off supports partial power-down-mode operation ? typical data rates ? 380 mbps (1.8-v to 3.3-v translation) ? 200 mbps ( < 1.8-v to 3.3-v translation) ? 200 mbps (translate to 2.5 v or 1.8 v) ? 150 mbps (translate to 1.5 v) ? 100 mbps (translate to 1.2 v) ? latch-up performance exceeds 100 ma per jesd 78, class ii ? esd protection exceeds the following levels (tested per jesd 22) ? 8000-v human-body model (a114-a) ? 250-v machine model (a115-a) ? 1500-v charged-device model (c101) 2 applications ? personal electronic ? industrial ? enterprise ? telecom 3 description this 4-bit noninverting bus transceiver uses two separate configurable power-supply rails. the a port is designed to track v cca . v cca accepts any supply voltage from 1.2 v to 3.6 v. the b port is designed to track v ccb . v ccb accepts any supply voltage from 1.2 to 3.6 v. the sn74avc4t774 is optimized to operate with v cca /v ccb set at 1.4 v to 3.6 v. it is operational with v cca /v ccb as low as 1.2 v. this allows for universal low-voltage bi-directional translation between any of the 1.2-v, 1.5-v, 1.8-v, 2.5-v, and 3.3-v voltage nodes. the sn74avc4t774 is designed for asynchronous communication between data buses. the logic levels of the direction-control (dir) input and the output- enable ( oe) input activate either the b-port outputs or the a-port outputs or place both output ports in the high-impedance mode. the device transmits data from the a bus to the b bus when the b outputs are activated, and from the b bus to the a bus when the a outputs are activated. the input circuitry on both a and b ports is always active and must have a logic high or low level applied to prevent excess i cc and i ccz . device information (1) part number package body size (nom) SN74AVC4T774PW tssop (16) 5.00 mm 4.40 mm sn74avc4t774rgy vqfn (16) 4.00 mm 3.50 mm sn74avc4t774rsv uqfn (16) 2.60 mm 1.80 mm (1) for all available packages, see the orderable addendum at the end of the datasheet. typical application schematic productfolder 1.8 v 0.1 f 0.1 f 3.0 v sn74avc4t774 processor spi port spi peripheral mosi a1 miso a2 clk a3 cs a4 v cca v ccb b1 b2 b3 b4 gnd oe dir1 = high dir2 = low dir3 = high dir4 = high support &community tools & software technical documents ordernow
2 sn74avc4t774 sces693e ? february 2008 ? revised october 2017 www.ti.com product folder links: sn74avc4t774 submit documentation feedback copyright ? 2008 ? 2017, texas instruments incorporated table of contents 1 features .................................................................. 1 2 applications ........................................................... 1 3 description ............................................................. 1 4 revision history ..................................................... 2 5 description (continued) ......................................... 3 6 pin configuration and functions ......................... 4 7 specifications ......................................................... 6 7.1 absolute maximum ratings ...................................... 6 7.2 esd ratings ............................................................ 6 7.3 recommended operating conditions ....................... 7 7.4 thermal information .................................................. 7 7.5 electrical characteristics t a = 25 c ......................... 8 7.6 electrical characteristics t a = ? 40 c to 85 c .......... 9 7.7 switching characteristics v cca = 1.2 v ................. 10 7.8 switching characteristics v cca = 1.5 v 0.1 v ..... 11 7.9 switching characteristics v cca = 1.8 v 0.15 v ... 12 7.10 switching characteristics v cca = 2.5 v 0.2 v ... 13 7.11 switching characteristics v cca = 3.3 v 0.3 v ... 14 7.12 typical characteristics .......................................... 15 8 parameter measurement information ................ 16 9 detailed description ............................................ 17 9.1 overview ................................................................. 17 9.2 functional block diagram ....................................... 17 9.3 feature description ................................................. 17 9.4 device functional modes ........................................ 17 10 application and implementation ........................ 18 10.1 application information .......................................... 18 10.2 typical application ............................................... 18 11 power supply recommendations ..................... 20 12 layout ................................................................... 20 12.1 layout guidelines ................................................. 20 12.2 layout example .................................................... 21 13 device and documentation support ................. 22 13.1 documentation support ........................................ 22 13.2 receiving notification of documentation updates 22 13.3 community resources .......................................... 22 13.4 trademarks ........................................................... 22 13.5 electrostatic discharge caution ............................ 22 13.6 glossary ................................................................ 22 14 mechanical, packaging, and orderable information ........................................................... 23 4 revision history note: page numbers for previous revisions may differ from page numbers in the current version. changes from revision d (january 2015) to revision e page ? added storage junction temperature to absolute maximum ratings ..................................................................................... 6 changes from revision c (december 2014) to revision d page ? changed pin functions table order for pins b4, b3, b2 and b1 ............................................................................................ 5 changes from revision b (may 2008) to revision c page ? added pin configuration and functions section, esd ratings table, feature description section, device functional modes , application and implementation section, power supply recommendations section, layout section, device and documentation support section, and mechanical, packaging, and orderable information section .............................. 1
3 sn74avc4t774 www.ti.com sces693e ? february 2008 ? revised october 2017 product folder links: sn74avc4t774 submit documentation feedback copyright ? 2008 ? 2017, texas instruments incorporated 5 description (continued) the sn74avc4t774 is designed so that the control pins (dir1, dir2, dir3, dir4, and oe) are supplied by v cca . this device is fully specified for partial-power-down applications using i off . the i off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. the v cc isolation feature ensures that if either v cc input is at gnd, then both ports are in the high-impedance state. to ensure the high-impedance state during power-up or power-down, oe should be tied to v cca through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. since this device has cmos inputs, it is very important to not allow them to float. if the inputs are not driven to either a high v cc state, or a low-gnd state, an undesirable larger than expected i cc current may result. since the input voltage settlement is governed by many factors (for example, capacitance, board-layout, package inductance, surrounding conditions, and so forth), ensuring that they these inputs are kept out of erroneous switching states and tying them to either a high or a low level minimizes the leakage-current.
4 sn74avc4t774 sces693e ? february 2008 ? revised october 2017 www.ti.com product folder links: sn74avc4t774 submit documentation feedback copyright ? 2008 ? 2017, texas instruments incorporated 6 pin configuration and functions pw package 16-pin tssop top view (1) shown for a single channel rgy package 16-pin vqfn top view rsv package 16-pin uqfn top view dir1 v cca dir2 a1 a2 a3 a4 dir3 v ccb b1b2 b3 b4 gnd dir4 oe 1 16 8 9 23 4 5 6 7 1514 13 12 11 10 dir1 dir2 v cca v ccb a1 a2 a3 a4 b1 b2 b3 b4 dir3 dir4 gnd oe 16 15 14 1 23 4 5 6 7 8 9 10 11 12 13 12 3 4 5 6 7 8 1615 14 13 12 11 10 9 dir1 dir2 a1 a2 a3 a4 dir3 dir4 v cca v ccb b1b2 b3 b4 gnd oe
5 sn74avc4t774 www.ti.com sces693e ? february 2008 ? revised october 2017 product folder links: sn74avc4t774 submit documentation feedback copyright ? 2008 ? 2017, texas instruments incorporated pin functions pin i/o description name pw rgy rsv dir1 1 15 i direction-control input referenced to v cca , controls signal flow for the first (a1/b1) i/o channels dir2 2 16 i direction-control input referenced to v cca , controls signal flow for the second (a2/b2) i/o channels a1 3 1 i/o input/output a1. referenced to v cca a2 4 2 i/o input/output a2. referenced to v cca a3 5 3 i/o input/output a3. referenced to v cca a4 6 4 i/o input/output a4. referenced to v cca dir3 7 5 i direction-control input referenced to v cca , controls signal flow for the third (a3/b3) i/o channels dir4 8 6 i direction-control input referenced to v cca , controls signal flow for the fourth (a4/b4) i/o channels oe 9 7 i 3-state output-mode enables. pull oe high to place all outputs in 3-state mode. referenced to v cca . gnd 10 8 ? ground b4 11 9 i/o input/output b4. referenced to v ccb b3 12 10 i/o input/output b3. referenced to v ccb b2 13 11 i/o input/output b2. referenced to v ccb b1 14 12 i/o input/output b1. referenced to v ccb v ccb 15 13 ? b-port supply voltage. 1.2 v v ccb 3.6 v v cca 16 14 ? a-port supply voltage. 1.2 v v cca 3.6 v
6 sn74avc4t774 sces693e ? february 2008 ? revised october 2017 www.ti.com product folder links: sn74avc4t774 submit documentation feedback copyright ? 2008 ? 2017, texas instruments incorporated (1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) the input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. (3) the output positive-voltage rating may be exceeded up to 4.6 v maximum if the output current rating is observed. 7 specifications 7.1 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) (1) min max unit v cca v ccb supply voltage ? 0.5 4.6 v v i input voltage (2) i/o ports (a port) ? 0.5 4.6 v i/o ports (b port) ? 0.5 4.6 control inputs ? 0.5 4.6 v o voltage applied to any output in the high-impedance or power-off state (2) a port ? 0.5 4.6 v b port ? 0.5 4.6 v o voltage applied to any output in the high or low state (2) (3) a port ? 0.5 v cca + 0.5 v b port ? 0.5 v ccb + 0.5 i ik input clamp current v i < 0 ? 50 ma i ok output clamp current v o < 0 ? 50 ma i o continuous output current 50 ma continuous current through v cca , v ccb , or gnd 100 ma t j storage junction temperature 150 c t stg storage temperature ? 65 150 c (1) jedec document jep155 states that 500-v hbm allows safe manufacturing with a standard esd control process. (2) jedec document jep157 states that 250-v cdm allows safe manufacturing with a standard esd control process. 7.2 esd ratings value unit v (esd) electrostatic discharge human-body model (hbm), per ansi/esda/jedec js-001 (1) 8000 v charged-device model (cdm), per jedec specification jesd22- c101 (2) 1500 machine model (a115-a) 250
7 sn74avc4t774 www.ti.com sces693e ? february 2008 ? revised october 2017 product folder links: sn74avc4t774 submit documentation feedback copyright ? 2008 ? 2017, texas instruments incorporated (1) v cci is the v cc associated with the input port. (2) v cco is the v cc associated with the output port. (3) all unused data inputs of the device must be held at v cci or gnd to ensure proper device operation. refer to the ti application report, implications of slow or floating cmos inputs , literature number scba004. (4) for v cci values not specified in the data sheet, v ih min = v cci 0.7 v, v il max = v cci 0.3 v (5) for v cca values not specified in the data sheet, v ih min = v cca 0.7 v, v il max = v cca 0.3 v 7.3 recommended operating conditions see (1) (2) (3) . v cci v cco min max unit v cca supply voltage 1.2 3.6 v v ccb supply voltage 1.2 3.6 v v ih high-level input voltage data inputs (4) 1.2 v to 1.95 v v cci 0.65 v 1.95 v to 2.7 v 1.6 2.7 v to 3.6 v 2 v il low-level input voltage data inputs (4) 1.2 v to 1.95 v v cci 0.35 v 1.95 v to 2.7 v 0.7 2.7 v to 3.6 v 0.8 v ih high-level input voltage dir (referenced to v cca ) (5) (dirx, oe) 1.2 v to 1.95 v v cca 0.65 v 1.95 v to 2.7 v 1.6 2.7 v to 3.6 v 2 v il low-level input voltage dir (referenced to v cca ) (5) (dirx, oe) 1.2 v to 1.95 v v cca 0.35 v 1.95 v to 2.7 v 0.7 2.7 v to 3.6 v 0.8 v i input voltage 0 3.6 v v o output voltage active state 0 v cco v 3-state 0 3.6 i oh high-level output current 1.1 v to 1.2 v ? 3 ma 1.4 v to 1.6 v ? 6 1.65 v to 1.95 v ? 8 2.3 v to 2.7 v ? 9 3 v to 3.6 v ? 12 i ol low-level output current 1.1 v to 1.2 v 3 ma 1.4 v to 1.6 v 6 1.65 v to 1.95 v 8 2.3 v to 2.7 v 9 3 v to 3.6 v 12 t/ v input transition rise or fall rate 5 ns/v t a operating free-air temperature ? 40 85 c (1) for more information about traditional and new thermal metrics, see the semiconductor and ic package thermal metrics application report. 7.4 thermal information thermal metric (1) sn74avc4t774 unit pw rgy rsv 16 pins 16 pins 16 pins r ja junction-to-ambient thermal resistance 118.2 37.7 139.2 c/w r jc(top) junction-to-case (top) thermal resistance 52.8 56.1 64.9 r jb junction-to-board thermal resistance 63.3 15.9 67.7 jt junction-to-top characterization parameter 8.8 0.5 1.7 jb junction-to-board characterization parameter 62.7 16.1 67.4 r jc(bot) junction-to-case (bottom) thermal resistance n/a n/a n/a
8 sn74avc4t774 sces693e ? february 2008 ? revised october 2017 www.ti.com product folder links: sn74avc4t774 submit documentation feedback copyright ? 2008 ? 2017, texas instruments incorporated (1) all unused control inputs of the device must be held at vcc or gnd to ensure proper device operation. refer to implications of slow or floating cmos inputs application report (2) v cco is the v cc associated with the output port. (3) v cci is the v cc associated with the input port. 7.5 electrical characteristics t a = 25 c over recommended operating free-air temperature range (unless otherwise noted) (1) (2) (3) parameter test conditions v cca v ccb min typ max unit v oh i oh = ? 100 a v i = v ih 1.2 v to 3.6 v 1.2 v to 3.6 v v i oh = ? 3 ma 1.2 v 1.2 v 0.95 i oh = ? 6 ma 1.4 v 1.4 v i oh = ? 8 ma 1.65 v 1.65 v i oh = ? 9 ma 2.3 v 2.3 v i oh = ? 12 ma 3 v 3 v v ol i ol = 100 a v i = v il 1.2 v to 3.6 v 1.2 v to 3.6 v v i ol = 3 ma 1.2 v 1.2 v 0.25 i ol = 6 ma 1.4 v 1.4 v i ol = 8 ma 1.65 v 1.65 v i ol = 9 ma 2.3 v 2.3 v i ol = 12 ma 3 v 3 v i i control inputs v i = v cca or gnd 1.2 v to 3.6 v 1.2 v to 3.6 v 0.025 0.25 a i off a or b port v i or v o = 0 to 3.6 v 0 v 0 v to 3.6 v 0.1 1 a 0 v to 3.6 v 0 v 0.1 1 i oz a or b port v o = v cco or gnd, v i = v cci or gnd, oe = v ih 3.6 v 3.6 v 0.5 2.5 a i cca v i = v cci or gnd, i o = 0 1.2 v to 3.6 v 1.2 v to 3.6 v a 0 v 0 v to 3.6 v 0 v to 3.6 v 0 v i ccb v i = v cci or gnd, i o = 0 1.2 v to 3.6 v 1.2 v to 3.6 v a 0 v 0 v to 3.6 v 0 v to 3.6 v 0 v i cca + i ccb v i = v cci or gnd, i o = 0 1.2 v to 3.6 v 1.2 v to 3.6 v a c i control inputs v i = 3.3 v or gnd 3.3 v 3.3 v 2.5 pf c io a or b port v o = 3.3 v or gnd 3.3 v 3.3 v 5 pf
9 sn74avc4t774 www.ti.com sces693e ? february 2008 ? revised october 2017 product folder links: sn74avc4t774 submit documentation feedback copyright ? 2008 ? 2017, texas instruments incorporated (1) v cci is the v cc associated with the input port. (2) v cco is the v cc associated with the output port. (3) all unused control inputs of the device must be held at vcc or gnd to ensure proper device operation. refer to implications of slow or floating cmos inputs application report . 7.6 electrical characteristics t a = ? 40 c to 85 c over recommended operating free-air temperature range (unless otherwise noted) (1) (2) (3) parameter test conditions v cca v ccb min typ max unit v oh i oh = ? 100 a v i = v ih 1.2 v to 3.6 v 1.2 v to 3.6 v v cco ? 0.2 v i oh = ? 3 ma 1.2 v 1.2 v i oh = ? 6 ma 1.4 v 1.4 v 1.05 i oh = ? 8 ma 1.65 v 1.65 v 1.2 i oh = ? 9 ma 2.3 v 2.3 v 1.75 i oh = ? 12 ma 3 v 3 v 2.3 v ol i ol = 100 a v i = v il 1.2 v to 3.6 v 1.2 v to 3.6 v 0.2 v i ol = 3 ma 1.2 v 1.2 v i ol = 6 ma 1.4 v 1.4 v 0.35 i ol = 8 ma 1.65 v 1.65 v 0.45 i ol = 9 ma 2.3 v 2.3 v 0.55 i ol = 12 ma 3 v 3 v 0.7 i i control inputs v i = v cca or gnd 1.2 v to 3.6 v 1.2 v to 3.6 v 1 a i off a or b port v i or v o = 0 to 3.6 v 0 v 0 v to 3.6 v 5 a 0 v to 3.6 v 0 v 5 i oz a or b port v o = v cco or gnd, v i = v cci or gnd, oe = v ih 3.6 v 3.6 v 5 a i cca v i = v cci or gnd, i o = 0 1.2 v to 3.6 v 1.2 v to 3.6 v 8 a 0 v 0 v to 3.6 v ? 2 0 v to 3.6 v 0 v 8 i ccb v i = v cci or gnd, i o = 0 1.2 v to 3.6 v 1.2 v to 3.6 v 8 a 0 v 0 v to 3.6 v 8 0 v to 3.6 v 0 v ? 2 i cca + i ccb v i = v cci or gnd, i o = 0 1.2 v to 3.6 v 1.2 v to 3.6 v 16 a c i control inputs v i = 3.3 v or gnd 3.3 v 3.3 v 3 pf c io a or b port v o = 3.3 v or gnd 3.3 v 3.3 v 6 pf
10 sn74avc4t774 sces693e ? february 2008 ? revised october 2017 www.ti.com product folder links: sn74avc4t774 submit documentation feedback copyright ? 2008 ? 2017, texas instruments incorporated 7.7 switching characteristics v cca = 1.2 v over recommended operating free-air temperature range, v cca = 1.2 v (unless otherwise noted) (see figure 3 ) parameter from (input) to (output) test conditions typ unit t plh t phl a b v ccb = 1.2 v 3.5 ns v ccb = 1.5 v 0.1 v 2.8 v ccb = 1.8 v 0.15 v 2.7 v ccb = 2.5 v 0.2 v 2.7 v ccb = 3.3 v 0.3 v 3.1 t plh t phl b a v ccb = 1.2 v 3.8 ns v ccb = 1.5 v 0.1 v 3.4 v ccb = 1.8 v 0.15 v 3.2 v ccb = 2.5 v 0.2 v 3 v ccb = 3.3 v 0.3 v 2.9 t pzh t pzl oe a v ccb = 1.2 v 6 ns v ccb = 1.5 v 0.1 v 4.8 v ccb = 1.8 v 0.15 v 4.4 v ccb = 2.5 v 0.2 v 5.3 v ccb = 3.3 v 0.3 v 9.3 t pzh t pzl oe b v ccb = 1.2 v 6.7 ns v ccb = 1.5 v 0.1 v 6.7 v ccb = 1.8 v 0.15 v 6.6 v ccb = 2.5 v 0.2 v 6.7 v ccb = 3.3 v 0.3 v 6.6 t phz t plz oe a v ccb = 1.2 v 4.3 ns v ccb = 1.5 v 0.1 v 3.6 v ccb = 1.8 v 0.15 v 3.7 v ccb = 2.5 v 0.2 v 3.3 v ccb = 3.3 v 0.3 v 4 t phz t plz oe b v ccb = 1.2 v 4.4 ns v ccb = 1.5 v 0.1 v 4.4 v ccb = 1.8 v 0.15 v 4.4 v ccb = 2.5 v 0.2 v 4.4 v ccb = 3.3 v 0.3 v 4.4
11 sn74avc4t774 www.ti.com sces693e ? february 2008 ? revised october 2017 product folder links: sn74avc4t774 submit documentation feedback copyright ? 2008 ? 2017, texas instruments incorporated 7.8 switching characteristics v cca = 1.5 v 0.1 v over recommended operating free-air temperature range, v cca = 1.5 v 0.1 v (see figure 3 ) parameter from (input) to (output) test conditions min typ max unit t plh t phl a b v ccb = 1.2 v 3.1 ns v ccb = 1.5 v 0.1 v 0.3 4.4 v ccb = 1.8 v 0.15 v 0.2 3.9 v ccb = 2.5 v 0.2 v 0.1 3.6 v ccb = 3.3 v 0.3 v 0.1 3.9 t plh t phl b a v ccb = 1.2 v 2.9 ns v ccb = 1.5 v 0.1 v 0.6 5.1 v ccb = 1.8 v 0.15 v 0.4 4.9 v ccb = 2.5 v 0.2 v 0.2 4.6 v ccb = 3.3 v 0.3 v 0.1 4.5 t pzh t pzl oe a v ccb = 1.2 v 5.3 ns v ccb = 1.5 v 0.1 v 1.1 7.1 v ccb = 1.8 v 0.15 v 0.9 6.2 v ccb = 2.5 v 0.2 v 0.7 5.5 v ccb = 3.3 v 0.3 v 0.1 6.4 t pzh t pzl oe b v ccb = 1.2 v 4.4 ns v ccb = 1.5 v 0.1 v 1.1 8.2 v ccb = 1.8 v 0.15 v 1.1 8.2 v ccb = 2.5 v 0.2 v 1.1 8.2 v ccb = 3.3 v 0.3 v 1.1 8.2 t phz t plz oe a v ccb = 1.2 v 3.6 ns v ccb = 1.5 v 0.1 v 1.2 4.8 v ccb = 1.8 v 0.15 v 0.8 5.4 v ccb = 2.5 v 0.2 v 0.4 5.1 v ccb = 3.3 v 0.3 v 1 5.4 t phz t plz oe b v ccb = 1.2 v 3.1 ns v ccb = 1.5 v 0.1 v 0.3 5.6 v ccb = 1.8 v 0.15 v 0.2 5.7 v ccb = 2.5 v 0.2 v 0.3 5.6 v ccb = 3.3 v 0.3 v 0.3 56
12 sn74avc4t774 sces693e ? february 2008 ? revised october 2017 www.ti.com product folder links: sn74avc4t774 submit documentation feedback copyright ? 2008 ? 2017, texas instruments incorporated 7.9 switching characteristics v cca = 1.8 v 0.15 v over recommended operating free-air temperature range, v cca = 1.8 v 0.15 v (see figure 3 ) parameter from (input) to (output) test conditions min typ max unit t plh t phl a b v ccb = 1.2 v 2.8 ns v ccb = 1.5 v 0.1 v 0.1 4.1 v ccb = 1.8 v 0.15 v 0.1 3.6 v ccb = 2.5 v 0.2 v 0.1 3.1 v ccb = 3.3 v 0.3 v 0.1 3.3 t plh t phl b a v ccb = 1.2 v 2.6 ns v ccb = 1.5 v 0.1 v 0.4 4.3 v ccb = 1.8 v 0.15 v 0.1 4.1 v ccb = 2.5 v 0.2 v 0.1 3.8 v ccb = 3.3 v 0.3 v 0.1 3.7 t pzh t pzl oe a v ccb = 1.2 v 5 ns v ccb = 1.5 v 0.1 v 0.8 6.7 v ccb = 1.8 v 0.15 v 0.6 5.8 v ccb = 2.5 v 0.2 v 0.4 4.8 v ccb = 3.3 v 0.3 v 0.3 4.6 t pzh t pzl oe b v ccb = 1.2 v 3.3 ns v ccb = 1.5 v 0.1 v 0.2 6.7 v ccb = 1.8 v 0.15 v 0.2 6.6 v ccb = 2.5 v 0.2 v 0.2 6.7 v ccb = 3.3 v 0.3 v 0.2 6.7 t phz t plz oe a v ccb = 1.2 v 3.4 ns v ccb = 1.5 v 0.1 v 0.7 4.7 v ccb = 1.8 v 0.15 v 0.3 5.1 v ccb = 2.5 v 0.2 v 0.1 4.5 v ccb = 3.3 v 0.3 v 0.8 5 t phz t plz oe b v ccb = 1.2 v 2.9 ns v ccb = 1.5 v 0.1 v 0.1 5.7 v ccb = 1.8 v 0.15 v 0.1 5.8 v ccb = 2.5 v 0.2 v 0.1 5.8 v ccb = 3.3 v 0.3 v 0.1 5.8
13 sn74avc4t774 www.ti.com sces693e ? february 2008 ? revised october 2017 product folder links: sn74avc4t774 submit documentation feedback copyright ? 2008 ? 2017, texas instruments incorporated 7.10 switching characteristics v cca = 2.5 v 0.2 v over recommended operating free-air temperature range, v cca = 2.5 v 0.2 v (see figure 3 ) parameter from (input) to (output) test conditions min typ max unit t plh t phl a b v ccb = 1.2 v 2.6 ns v ccb = 1.5 v 0.1 v 0.1 3.8 v ccb = 1.8 v 0.15 v 0.1 3.2 v ccb = 2.5 v 0.2 v 0.1 2.7 v ccb = 3.3 v 0.3 v 0.1 2.6 t plh t phl b a v ccb = 1.2 v 2.5 ns v ccb = 1.5 v 0.1 v 0.5 3.4 v ccb = 1.8 v 0.15 v 0.2 3.1 v ccb = 2.5 v 0.2 v 0.1 2.8 v ccb = 3.3 v 0.3 v 0.1 2.6 t pzh t pzl oe a v ccb = 1.2 v 4.7 ns v ccb = 1.5 v 0.1 v 0.7 6.2 v ccb = 1.8 v 0.15 v 0.5 5.2 v ccb = 2.5 v 0.2 v 0.3 4.1 v ccb = 3.3 v 0.3 v 0.3 3.6 t pzh t pzl oe b v ccb = 1.2 v 2.3 ns v ccb = 1.5 v 0.1 v 0.4 4.5 v ccb = 1.8 v 0.15 v 0.4 4.5 v ccb = 2.5 v 0.2 v 0.4 4.5 v ccb = 3.3 v 0.3 v 0.4 4.5 t phz t plz oe a v ccb = 1.2 v 3 ns v ccb = 1.5 v 0.1 v 0.2 4.3 v ccb = 1.8 v 0.15 v 0.1 4.9 v ccb = 2.5 v 0.2 v 0.1 4 v ccb = 3.3 v 0.3 v 0.7 4.3 t phz t plz oe b v ccb = 1.2 v 1.9 ns v ccb = 1.5 v 0.1 v 01 4.7 v ccb = 1.8 v 0.15 v 0.1 4.6 v ccb = 2.5 v 0.2 v 0.1 4.7 v ccb = 3.3 v 0.3 v 0.1 4.7
14 sn74avc4t774 sces693e ? february 2008 ? revised october 2017 www.ti.com product folder links: sn74avc4t774 submit documentation feedback copyright ? 2008 ? 2017, texas instruments incorporated 7.11 switching characteristics v cca = 3.3 v 0.3 v over recommended operating free-air temperature range, v cca = 3.3 v 0.3 v (see figure 3 ) parameter from (input) to (output) test conditions min typ max unit t plh t phl a b v ccb = 1.2 v 2.5 ns v ccb = 1.5 v 0.1 v 0.1 3.6 v ccb = 1.8 v 0.15 v 0.1 3 v ccb = 2.5 v 0.2 v 0.1 2.6 v ccb = 3.3 v 0.3 v 0.1 2.4 t plh t phl b a v ccb = 1.2 v 2.6 ns v ccb = 1.5 v 0.1 v 0.5 3.4 v ccb = 1.8 v 0.15 v 0.2 2.9 v ccb = 2.5 v 0.2 v 0.1 2.5 v ccb = 3.3 v 0.3 v 0.1 2.3 t pzh t pzl oe a v ccb = 1.2 v 4.5 ns v ccb = 1.5 v 0.1 v 0.9 5.9 v ccb = 1.8 v 0.15 v 0.5 5 v ccb = 2.5 v 0.2 v 0.3 3.8 v ccb = 3.3 v 0.3 v 0.3 3.3 t pzh t pzl oe b v ccb = 1.2 v 1.9 ns v ccb = 1.5 v 0.1 v 0.4 3.6 v ccb = 1.8 v 0.15 v 0.4 3.6 v ccb = 2.5 v 0.2 v 0.4 3.6 v ccb = 3.3 v 0.3 v 0.4 3.6 t phz t plz oe a v ccb = 1.2 v 2.7 ns v ccb = 1.5 v 0.1 v 0.1 4.2 v ccb = 1.8 v 0.15 v 0.1 4.6 v ccb = 2.5 v 0.2 v 0.3 3.8 v ccb = 3.3 v 0.3 v 0.7 3.9 t phz t plz oe b v ccb = 1.2 v 2.3 ns v ccb = 1.5 v 0.1 v 0.1 4.5 v ccb = 1.8 v 0.15 v 0.1 4.5 v ccb = 2.5 v 0.2 v 0.1 4.6 v ccb = 3.3 v 0.3 v 0.1 4.6
15 sn74avc4t774 www.ti.com sces693e ? february 2008 ? revised october 2017 product folder links: sn74avc4t774 submit documentation feedback copyright ? 2008 ? 2017, texas instruments incorporated 7.12 typical characteristics figure 1. low-level output voltage (v ol ) vs low-level current (i ol ) at v cca = v ccb = 3.6 v figure 2. high-level output voltage (v oh ) vs high-level current (i oh ) at v cca = v ccb = 3.6 v
16 sn74avc4t774 sces693e ? february 2008 ? revised october 2017 www.ti.com product folder links: sn74avc4t774 submit documentation feedback copyright ? 2008 ? 2017, texas instruments incorporated 8 parameter measurement information figure 3. load and circuit and voltage waveforms v oh v ol from output under test c l (see note a) load circuit s1 2 v cco open gnd r l r l t plh t phl output control (low-level enabling) output waveform 1 s1 at 2 v cco (see note b) output waveform 2 s1 at gnd (see note b) t pzl t pzh t plz t phz v cca /2 v cca /2 v cci /2 v cci /2 v cci 0 v v cco /2 v cco /2 v oh v ol 0 v v cco /2 v ol + v tp v cco /2 v oh ? v tp 0 v v cci 0 v v cci /2 v cci /2 t w input v cca v cco voltage waveforms propagation delay times voltage waveforms pulse duration voltage waveforms enable and disable times output input t pd t plz /t pzl t phz /t pzh open 2 v cco gnd test s1 notes: a. c l includes probe and jig capacitance. b. waveform 1 is for an output with internal conditions such that the output is l ow, except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high, exc ept when disabled by the output control. c. all input pulses are supplied by generators having the following chara cteristics: prr 10 mhz, z o = 50 w, dv/dt 1 v/ns. d. the outputs are measured one at a time, with one transition per measuremen t. e. t plz and t phz are the same as t dis . f. t pzl and t pzh are the same as t en . g. t plh and t phl are the same as t pd . h. v cci is the v cc associated with the input port. i. v cco is the v cc associated with the output port. 1.2 v 1.5 v 0.1 v 1.8 v 0.15 v 2.5 v 0.2 v 3.3 v 0.3 v 2 ! 2 ! 2 ! 2 ! 2 ! v cco r l 0.1 v 0.1 v 0.15 v 0.15 v 0.3 v v t p c l 15 pf 15 pf 15 pf 15 pf 15 pf
17 sn74avc4t774 www.ti.com sces693e ? february 2008 ? revised october 2017 product folder links: sn74avc4t774 submit documentation feedback copyright ? 2008 ? 2017, texas instruments incorporated 9 detailed description 9.1 overview the sn74avc4t774 is a 4-bit, dual-supply, noninverting, bi-directional voltage level translation. pins an and control pins (dir1, dir2, dir3, dir4 and oe) are support by v cca and pins bn are support by v ccb . the a port is able to accept i/o voltages ranging from 1.2 v to 3.6 v, while the b port can accept i/o voltages from 1.2 v to 3.6 v. a high on dir allows data transmission from an to bn and a low on dir allows data transmission from b to a when oe is set to low. when oe is set to high, both an and bn are in the high-impedance state. 9.2 functional block diagram figure 4. logic diagram (positive logic) 9.3 feature description 9.3.1 fully configurable dual-rail design allows each port to operate over the full 1.2-v to 3.6-v power-supply range both v cca and v ccb can be supplied at any voltage between 1.2 v and 3.6 v making the device suitable for translating between any of the low-voltage nodes (1.2 v, 1.8 v, 2.5 v and 3.3 v). 9.3.2 support high-speed translation sn74avc4t774 can support high data rate application. the translated signal data rate can be up to 380 mbps when signal is translated from 1.8 v to 3.3 v. 9.3.3 i off supports partial-power-down mode operation i off will prevent backflow current by disabling i/o output circuits when device is in partial-power-down mode. 9.4 device functional modes table 1. function table (each bit) control inputs output circuits operation oe dir a port b port l l enabled hi-z b data to a data l h hi-z enabled a data to b data h x hi-z hi-z isolation dir1 a1 oe b1
18 sn74avc4t774 sces693e ? february 2008 ? revised october 2017 www.ti.com product folder links: sn74avc4t774 submit documentation feedback copyright ? 2008 ? 2017, texas instruments incorporated 10 application and implementation note information in the following applications sections is not part of the ti component specification, and ti does not warrant its accuracy or completeness. ti ? s customers are responsible for determining suitability of components for their purposes. customers should validate and test their design implementation to confirm system functionality. 10.1 application information the sn74avc4t774 device can be used in level-translation applications for interfacing devices or systems operating at different interface voltages with one another. the sn74avc4t774 device is ideal for use in applications where a push-pull driver is connected to the data i/os. its max data rate can be up to 380 mbps when device translate signal from 1.8 v to 3.3 v. 10.2 typical application figure 5. typical application of the sn74avc4t774 10.2.1 design requirements for this design example, use the parameters listed in table 2 . table 2. design parameters design parameters example value input voltage range 1.2 v to 3.6 v output voltage range 1.2 v to 3.6 v 1.8 v 0.1 f 0.1 f 3.0 v sn74avc4t774 processor spi port spi peripheral mosi a1 miso a2 clk a3 cs a4 v cca v ccb b1 b2 b3 b4 gnd oe dir1 = high dir2 = low dir3 = high dir4 = high
19 sn74avc4t774 www.ti.com sces693e ? february 2008 ? revised october 2017 product folder links: sn74avc4t774 submit documentation feedback copyright ? 2008 ? 2017, texas instruments incorporated 10.2.2 detailed design procedure to begin the design process, determine the following: ? input voltage range ? use the supply voltage of the device that is driving the sn74avc4t774 device to determine the input voltage range. for a valid logic high, the value must exceed the v ih of the input port. for a valid logic low, the value must be less than the v il of the input port. ? output voltage range ? use the supply voltage of the device that the sn74avc4t774 device is driving to determine the output voltage range. 10.2.3 application curve figure 6. translation up (1.2 v to 3.3 v) at 2.5 mhz
20 sn74avc4t774 sces693e ? february 2008 ? revised october 2017 www.ti.com product folder links: sn74avc4t774 submit documentation feedback copyright ? 2008 ? 2017, texas instruments incorporated 11 power supply recommendations the sn74avc4t774 device uses two separate configurable power-supply rails, v cca and v ccb . v cca accepts any supply voltage from 1.2 v to 3.6 v and v ccb accepts any supply voltage from 1.2 v to 3.6 v. the a port and b port are designed to track v cca and v ccb respectively allowing for low-voltage, bi-directional translation between any of the 1.2-v, 1.5-v, 1.8-v, 2.5-v and 3.3-v voltage nodes. the output-enable oe input circuit is designed so that it is supplied by v cca and when the oe input is high, all outputs are placed in the high-impedance state. to ensure the high-impedance state of the outputs during power-up or power-down, the oe input pin must be tied to v cca through a pullup resistor and must not be enabled until v cca and v ccb are fully ramped and stable. the minimum value of the pullup resistor to v cca is determined by the current-sinking capability of the driver. 12 layout 12.1 layout guidelines to ensure reliability of the device, following common printed-circuit board layout guidelines are recommended: ? bypass capacitors should be used on power supplies. ? short trace lengths should be used to avoid excessive loading. ? placing pads on the signal paths for loading capacitors or pullup resistors to help adjust rise and fall times of signals depending on the system requirements
21 sn74avc4t774 www.ti.com sces693e ? february 2008 ? revised october 2017 product folder links: sn74avc4t774 submit documentation feedback copyright ? 2008 ? 2017, texas instruments incorporated 12.2 layout example figure 7. pcb layout example 1 2 3 4 16 b1 a1 dir1 v ccb dir2 legend via to power plane via to gnd plane (inner layer) polygonal copper pour from controller 15 14 13 v cca 5 6 7 8 12 gnd a3 b4 a2 b2 b3 a4 11 10 9 v cca oe v cca bypass capacitor from controller to system to controller from system sn74avc4t774 v ccb keep oe high until v cca and v ccb are powered up dir3 dir4 from controller v cca v cca to system to system v cca
22 sn74avc4t774 sces693e ? february 2008 ? revised october 2017 www.ti.com product folder links: sn74avc4t774 submit documentation feedback copyright ? 2008 ? 2017, texas instruments incorporated 13 device and documentation support 13.1 documentation support 13.1.1 related documentation for related documentation see the following: ? understanding and interpreting standard-logic data sheets ? selecting the right level translation solution ? introduction to logic ? solving cmos transition rate issues using schmitt trigger solution ? voltage translation between 3.3-v, 2.5-v, 1.8-v, and 1.5-v logic standards ? semiconductor packing material electrostatic discharge (esd) protection ? 16-bit widebus logic families in 56-ball, 0.65-mm pitch very thin fine-pitch bga ? dynamic output control (doc) circuitry technology and applications (rev. b) ? avc logic family technology and applications ? avc advanced very-low-voltage cmos logic data book, march 2000 ? logic guide ? ti tablet solutions ? logic pocket data book ? i logic cross-reference ? lcd module interface application clip ? standard linear & logic for pcs, servers & motherboards 13.2 receiving notification of documentation updates to receive notification of documentation updates, navigate to the device product folder on ti.com. in the upper right corner, click on alert me to register and receive a weekly digest of any product information that has changed. for change details, review the revision history included in any revised document. 13.3 community resources the following links connect to ti community resources. linked contents are provided "as is" by the respective contributors. they do not constitute ti specifications and do not necessarily reflect ti's views; see ti's terms of use . ti e2e ? online community ti's engineer-to-engineer (e2e) community. created to foster collaboration among engineers. at e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. design support ti's design support quickly find helpful e2e forums along with design support tools and contact information for technical support. 13.4 trademarks e2e is a trademark of texas instruments. all other trademarks are the property of their respective owners. 13.5 electrostatic discharge caution these devices have limited built-in esd protection. the leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the mos gates. 13.6 glossary slyz022 ? ti glossary . this glossary lists and explains terms, acronyms, and definitions.
23 sn74avc4t774 www.ti.com sces693e ? february 2008 ? revised october 2017 product folder links: sn74avc4t774 submit documentation feedback copyright ? 2008 ? 2017, texas instruments incorporated 14 mechanical, packaging, and orderable information the following pages include mechanical, packaging, and orderable information. this information is the most current data available for the designated devices. this data is subject to change without notice and revision of this document. for browser-based versions of this data sheet, refer to the left-hand navigation.
package option addendum www.ti.com 21-dec-2018 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples 74avc4t774rgyrg4 active vqfn rgy 16 3000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 85 wt774 74avc4t774rsvr-nt active uqfn rsv 16 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 zvk 74avc4t774rsvrg4 active uqfn rsv 16 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 zvk SN74AVC4T774PW active tssop pw 16 90 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 wt774 SN74AVC4T774PWr active tssop pw 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 wt774 sn74avc4t774rgyr active vqfn rgy 16 3000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 85 wt774 sn74avc4t774rsvr active uqfn rsv 16 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 zvk (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) rohs: ti defines "rohs" to mean semiconductor products that are compliant with the current eu rohs requirements for all 10 rohs substances, including the requirement that rohs substance do not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, "rohs" products are suitable for use in specified lead-free processes. ti may reference these types of products as "pb-free". rohs exempt: ti defines "rohs exempt" to mean products that contain lead but are compliant with eu rohs pursuant to a specific eu rohs exemption. green: ti defines "green" to mean the content of chlorine (cl) and bromine (br) based flame retardants meet js709b low halogen requirements of <=1000ppm threshold. antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device.
package option addendum www.ti.com 21-dec-2018 addendum-page 2 (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis.
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant 74avc4t774rsvr-nt uqfn rsv 16 3000 180.0 8.4 2.0 2.8 0.7 4.0 8.0 q1 SN74AVC4T774PWr tssop pw 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 q1 sn74avc4t774rgyr vqfn rgy 16 3000 330.0 12.4 3.8 4.3 1.5 8.0 12.0 q1 sn74avc4t774rsvr uqfn rsv 16 3000 178.0 13.5 2.1 2.9 0.75 4.0 12.0 q1 sn74avc4t774rsvr uqfn rsv 16 3000 180.0 12.4 2.1 2.9 0.75 4.0 12.0 q1 package materials information www.ti.com 22-dec-2018 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) 74avc4t774rsvr-nt uqfn rsv 16 3000 203.0 203.0 35.0 SN74AVC4T774PWr tssop pw 16 2000 367.0 367.0 35.0 sn74avc4t774rgyr vqfn rgy 16 3000 367.0 367.0 35.0 sn74avc4t774rsvr uqfn rsv 16 3000 189.0 185.0 36.0 sn74avc4t774rsvr uqfn rsv 16 3000 203.0 203.0 35.0 package materials information www.ti.com 22-dec-2018 pack materials-page 2
www.ti.com package outline c 14x 0.65 2x 4.55 16x 0.30 0.19 typ 6.6 6.2 1.2 max 0.15 0.05 0.25 gage plane -8 0 b note 4 4.5 4.3 a note 3 5.1 4.9 0.75 0.50 (0.15) typ tssop - 1.2 mm max height pw0016a small outline package 4220204/a 02/2017 1 8 9 16 0.1 c a b pin 1 index area see detail a 0.1 c notes: 1. all linear dimensions are in millimeters. any dimensions in parenthesis are for reference only. dimensioning and tolerancing per asme y14.5m. 2. this drawing is subject to change without notice. 3. this dimension does not include mold flash, protrusions, or gate burrs. mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. this dimension does not include interlead flash. interlead flash shall not exceed 0.25 mm per side. 5. reference jedec registration mo-153. seating plane a 20 detail a typical scale 2.500
www.ti.com example board layout 0.05 max all around 0.05 min all around 16x (1.5) 16x (0.45) 14x (0.65) (5.8) (r0.05) typ tssop - 1.2 mm max height pw0016a small outline package 4220204/a 02/2017 notes: (continued) 6. publication ipc-7351 may have alternate designs. 7. solder mask tolerances between and around signal pads can vary based on board fabrication site. land pattern example exposed metal shown scale: 10x symm symm 1 8 9 16 15.000 metal solder mask opening metal under solder mask solder mask opening exposed metal exposed metal solder mask details non-solder mask defined (preferred) solder mask defined
www.ti.com example stencil design 16x (1.5) 16x (0.45) 14x (0.65) (5.8) (r0.05) typ tssop - 1.2 mm max height pw0016a small outline package 4220204/a 02/2017 notes: (continued) 8. laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. ipc-7525 may have alternate design recommendations. 9. board assembly site may have different recommendations for stencil design. solder paste example based on 0.125 mm thick stencil scale: 10x symm symm 1 8 9 16

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